A highly experienced team provides a broad range of FPGA design services on major FPGA device families (Xilinx, Altera and Lattice). The FPGA design team provides the customer with the know-how and support needed to solve FPGA design challenges.

  • Help the customer create the FPGA design architecture
  • Help the customer select the right device based on product specification
  • Harness new technologies such as the Xilinx Zynq®-7000 and Altera SoC (Programmable SoC) to reduce time to market
  • RTL code development, simulation testing and associated toolsets
  • Component mapping with search for maximum level of pipelining and parallelism
  • FPGA/board clocking, framing and frequency management
  • Interface design and IP mapping including high speed links:
  • Standard Antenna IFs (CPRI, OBSAI)
  • Processor IFs (general purpose memory access bus, TI DSP EMIF)
  • Static RAM/DPRAM IF
  • DDR3 IF IP mapping
  • Geth MAC IP mapping
  • Serial interfaces (I2C, SPI, UART)
  • Other LVDS & HIGH SPEED Ifs

FPGA Design

Wide Range of DSP Algorithms

  • Radio Digital Up and Down conversion chains (interpolators & decimators, shaping filters, CFR, FFT/IFFT, NCO/CORDIC, digital modulation/demodulation)
  • Coding/decoding (block, convolutional Viterbi and Turbo)
  • Channel equalization
  • Latest generation power amplifier Digital Pre-distortion algorithms
  • Matrices manipulations (pseudoinverse, least squares, linear system solver, Cholesky, QR decomposition)
  • MATLAB floating and finite precision algorithm implementation, simulation and critical evaluation
  • Fixed-point precision adaptation strategy on FPGA


Xilinx (Zynq, Kintex7, Virtex)
  • Viterbi demodulator for radio channel equalization
  • 256 states Viterbi decoder
  • Turbo Decoder
  • Joint Detection channel equalization based on FFT method for Toeplitz block matrix Baseband interface bridge to RF card
  • Remote Radio Head for WCDMA and LTE
  • High performance large band complete digital pre-distortion algorithm for PA linearization

Altera (Startix and Cyclone)
  • WCDMA digital signal processing chain for Uplink and Downlink frame generation (Release99+HSPA) and management of downlink frame
  • Complete WiMAX and LTE Up and Down conversion chains for RF card (Interpolators, decimators, shaping filters, CFR, NCO)
  • Fast Ethernet MAC
  • FPGA development for unicast and multicast transport card on E-BSC (GERAN)
  • ASIC to FPGA conversion for preliminary testing and SW debug
  • Usage of Altera NIOS and Xilinx Microblaze in several designs (mainly for control functions)

Lattice (ECP3)
  • Complete WCDMA & LTE Up/Down conversion chains for multi-carrier/multi-standard/multi-antenna RF cards (interpolators, decimators, shaping filters, CFR, NCO)
  • Flexible CPRI antenna I/F
  • Control management unit for industrial printer

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